
CY28323PVC
. Document #: 38-07004 Rev. *B Page Page 18 of 21 of 21
Switching Waveforms
Duty Cycle Timing
t1B
(Single Ended Output)
t1A
Duty Cycle Timing (CPU Differential Output)
t1B
t1A
All Outputs Rise/Fall Time
OUTPUT
t2
VDD
0V
t3
CPU-CPU Clock Skew
Host_b
Host
t4
Host_b
Host
3V66-3V66 Clock Skew
3V66
t5